a p10tn004cmt advanced power n-channel enhancement mode electronics corp. power mosfet simple drive requirement bv dss 100v so-8 compatible with heatsink r ds(on) 4.8m ultra low on-resistance i d 100a rohs compliant & halogen-free description absolute maximum ratings@ t j =25 o c(unless otherwise specified) symbol units v ds v v gs v i d @t c =25 a i d @t a =25 a i d @t a =70 a i dm a p d @t c =25 w p d @t a =25 w e as single pulse avalanche energy 4 mj t stg t j symbol value unit rthj-c maximum thermal resistance, junction-case 1.2 /w rthj-a maximum thermal resistance, junction-ambient 3 25 /w + 20 22.8 18.2 100 rating 100 halogen-free product -55 to 150 drain current, v gs @ 10v 3 201707213 1 parameter total power dissipation 3 operating junction temperature range thermal data 5 -55 to 150 pulsed drain current 1 400 storage temperature range 104 total power dissipation 350 parameter drain-source voltage gate-source voltage drain current, v gs @ 10v 3 drain current (chip), v gs @ 10v a p10tn004c series are from advanced power innovated design and silicon process technology to achieve the lowest possible on- resistance and fast switching performance. it provides the designe r with an extreme efficient device for use in a wide range of powe r applications. the pmpak ? 5x6 package is special for dc-dc converters application and the foot print is compatible with so-8 with backside heat sink and lower profile. s s s g pmpak ? 5 x 6 d d d d g d s .
electrical characteristics@t j =25 o c(unless otherwise specified) symbol parameter test conditions min. typ. max. units bv dss drain-source breakdown voltage v gs =0v, i d =250ua 100 - - v r ds(on) static drain-source on-resistance 2 v gs =10v, i d =20a - - 4.8 m v gs(th) gate threshold voltage v ds =v gs , i d =250ua 2 - 4 v g fs forward transconductance v ds =10v, i d =20a - 40 - s i dss drain-source leakage current v ds =80v, v gs =0v - - 25 ua i gss gate-source leakage v gs =+ 20v, v ds =0v - - + 100 na q g total gate charge i d =20a - 73 117 nc q gs gate-source charge v ds =50v - 21 - nc q gd gate-drain ("miller") charge v gs =10v - 22 - nc t d(on) turn-on delay time v ds =50v - 24 - ns t r rise time i d =20a - 72 - ns t d(off) turn-off delay time r g =6 -57- ns t f fall time v gs =10v - 74 - ns c iss input capacitance v gs =0v - 4120 6600 pf c oss output capacitance v ds =80v - 650 - pf c rss reverse transfer capacitance f=1.0mhz - 8 - pf r g gate resistance f=1.0mhz - 1.6 3.2 source-drain diode symbol parameter test conditions min. typ. max. units v sd forward on voltage 2 i s =20a, v gs =0v - - 1.2 v t rr reverse recovery time i s =20a, v gs =0 v , - 70 - ns q rr reverse recovery charge di/dt=100a/s - 160 - nc notes: 1.pulse width limited by max. junction temperature. 2.pulse test 3.surface mounted on 1 in 2 copper pad of fr4 board, t < 10sec; 60 o c/w at steady state. 4.starting t j =25 o c , v dd =50v , l=3mh , r g =25 this product is sensitive to electrostatic discharge, please handle with caution. use of this product as a critical component in life support or other similar systems is not authorized. apec does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. apec reserves the right to make changes without further notice to any products herein to improve reliability, function or design. AP10TN004CMT 2 .
a p10tn004cm t fig 1. typical output characteristics fig 2. typical output characteristics fig 3. on-resistance v.s. gate voltage fig 4. normalized on-resistance v.s. junction temperature fi g 5. forward characteristic o f fig 6. gate threshold voltage v.s. reverse diode junction temperature 3 0 40 80 120 160 200 0246810 v ds , drain-to-source voltage (v) i d , drain current (a) 10v 9.0v 8.0v 7.0v v g = 6.0v t c =25 o c 0 20 40 60 80 100 120 0246810 v ds , drain-to-source voltage (v) i d , drain current (a) t c = 150 o c 10v 9.0v 8.0v 7.0v v g = 6.0v 4 6 8 10 12 14 16 45678910 v gs , gate-to-source voltage (v) r ds(on) (m ) i d =20a t c =25 o c 0.4 0.8 1.2 1.6 2.0 2.4 -100 -50 0 50 100 150 t j , junction temperature ( o c) normalized r ds(on) i d =20a v g =10v 0.0 0.4 0.8 1.2 1.6 2.0 -100 -50 0 50 100 150 t j , junction temperature ( o c) normalized v gs(th) 0 4 8 12 16 20 0 0.2 0.4 0.6 0.8 1 1.2 v sd , source-to-drain voltage (v) i s (a) t j =25 o c t j =150 o c i d =250ua .
ap10tn004cm t fig 7. gate charge characteristics fig 8. typical capacitance characteristics fig 9. maximum safe operating area fig 10. effective transient thermal impedance fig 11. drain current v.s. case fig 12. transfer characteristics temperature 4 0 2 4 6 8 10 12 0 20406080100 q g , total gate charge (nc) v gs , gate to source voltage (v) i d =20a v ds =50v 0 2000 4000 6000 8000 1 21 41 61 81 101 121 v ds , drain-to-source voltage (v) c (pf) f =1.0mh z c iss c oss c rss 0.01 0.1 1 0.00001 0.0001 0.001 0.01 0.1 1 10 t , pulse width (s) normalized thermal response (r thjc ) p dm duty factor = t/t peak t j = p dm x r thjc + t c t t 0.02 0.01 0.05 0.1 0.2 duty factor=0.5 single pulse 0.1 1 10 100 1000 0.1 1 10 100 1000 v ds , drain-to-source voltage (v) i d (a) t c =25 o c single pulse 10us 100us 1ms 10ms 100ms dc 0 40 80 120 160 25 50 75 100 125 150 t c , case temperature ( o c ) i d , drain current (a) 0 40 80 120 160 0246810 v gs , gate-to-source voltage (v) i d , drain current (a) t j =150 o c t j =25 o c v ds =5v operation in this area limited by r ds(on) .
ap10tn004cm t fig 13. normalized bv dss v.s. junction fig 14. total power dissipation temperature fig 15. typ. drain-source on state resistance 5 0 20 40 60 80 100 120 0 50 100 150 t c , case temperature( o c) p d , power dissipation(w) 0 0.4 0.8 1.2 1.6 2 -100 -50 0 50 100 150 t j , junction temperature ( o c) normalized bv dss i d =1ma 2 6 10 14 18 0 20406080100 i d , drain current (a) r ds(on) (m ) t j =25 o c v gs =10v .
AP10TN004CMT marking information 6 date code (ywwsss) y last digit of the year ww week sss sequence part numbe r 10tn004c ywwsss .
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